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» Experimental comparison of control architectures
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DAC
2006
ACM
16 years 6 months ago
Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM
Increasing source voltage (Source-Biasing) is an efficient technique for reducing gate and sub-threshold leakage of SRAM arrays. However, due to process variation, a higher source...
Swaroop Ghosh, Saibal Mukhopadhyay, Kee-Jong Kim, ...
DAC
2006
ACM
16 years 6 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
16 years 6 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
VLDB
2007
ACM
108views Database» more  VLDB 2007»
16 years 6 months ago
Update Exchange with Mappings and Provenance
We consider systems for data sharing among heterogeneous peers related by a network of schema mappings. Each peer has a locally controlled and edited database instance, but wants ...
Todd J. Green, Grigoris Karvounarakis, Zachary G. ...
GECCO
2009
Springer
166views Optimization» more  GECCO 2009»
16 years 12 days ago
Genetic programming in the wild: evolving unrestricted bytecode
We describe a methodology for evolving Java bytecode, enabling the evolution of extant, unrestricted Java programs, or programs in other languages that compile to Java bytecode. B...
Michael Orlov, Moshe Sipper