Sciweavers

707 search results - page 74 / 142
» Experimental comparison of control architectures
Sort
View
DAC
2006
ACM
14 years 10 months ago
Architecture-aware FPGA placement using metric embedding
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
Padmini Gopalakrishnan, Xin Li, Lawrence T. Pilegg...
DAC
2006
ACM
14 years 3 months ago
A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming
We propose a novel and efficient charge-based decoupling capacitance budgeting algorithm. Our method uses the macromodeling technique and effective radius of decoupling capacitan...
Min Zhao, Rajendran Panda, Savithri Sundareswaran,...
DAC
1995
ACM
14 years 21 days ago
Multi-way Partitioning for Minimum Delay for Look-Up Table Based FPGAs
In this paper we present a set cover based approach (SCP) to multi-way partitioning for minimum delay for Look-Up Table based FPGAs. SCP minimizes the number of chip-crossings on ...
Prashant Sawkar, Donald E. Thomas
ADBIS
2009
Springer
135views Database» more  ADBIS 2009»
13 years 7 months ago
Systematic Exploration of Efficient Query Plans for Automated Database Restructuring
We consider the problem of selecting views and indexes that minimize the evaluation costs of the important queries under an upper bound on the disk space available for storing the ...
Maxim Kormilitsin, Rada Chirkova, Yahya Fathi, Mat...
DATE
2007
IEEE
95views Hardware» more  DATE 2007»
14 years 3 months ago
A multi-core debug platform for NoC-based systems
Network-on-Chip (NoC) is generally regarded as the most promising solution for the future on-chip communication scheme in gigascale integrated circuits. As traditional debug archi...
Shan Tang, Qiang Xu