74 search results - page 5 / 15 » Experimentation with bounded buffer synchronization |
ASPDAC
2010
ACM
13 years 5 months ago
2010
ACM
Abstract-- We present a global scheduling framework for synchronous data flow (SDF) streaming applications on MPSoCs, based on optimized computation and contention-free routing. Th...
EMSOFT
2007
Springer
14 years 1 months ago
2007
Springer
Software components are modular and can enable post-deployment update, but their high overhead in runtime and memory is prohibitive for many embedded systems. This paper proposes ...
VLSID
2010
IEEE
13 years 5 months ago
2010
IEEE
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
ICIP
2003
IEEE
14 years 9 months ago
2003
IEEE
Video scenes containing multiple objects can potentially achieve higher degree of compression and better visual quality with individual coding for each object. Not always are vide...