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» Experiments with a Parallel External Memory System
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SAC
2006
ACM
14 years 21 days ago
Building the functional performance model of a processor
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
Alexey L. Lastovetsky, Ravi Reddy, Robert Higgins
HPCA
2007
IEEE
14 years 1 months ago
Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures
To provide high dependability in a multithreaded system despite hardware faults, the system must detect and correct errors in its shared memory system. Recent research has explore...
Albert Meixner, Daniel J. Sorin
BMCBI
2006
158views more  BMCBI 2006»
13 years 6 months ago
Parallelization of multicategory support vector machines (PMC-SVM) for classifying microarray data
Background: Multicategory Support Vector Machines (MC-SVM) are powerful classification systems with excellent performance in a variety of data classification problems. Since the p...
Chaoyang Zhang, Peng Li, Arun Rajendran, Youping D...
HPDC
1999
IEEE
13 years 11 months ago
PARED: A Framework for the Adaptive Solution of PDEs
We describe our experience using PARED, an object oriented system for the adaptive solution of PDEs in a distributed computing environment. PARED handles selective mesh refinement...
José G. Castaños, John E. Savage
HPCA
2002
IEEE
14 years 7 months ago
Evaluation of a Multithreaded Architecture for Cellular Computing
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
Calin Cascaval, José G. Castaños, Lu...