Sciweavers

859 search results - page 49 / 172
» Explaining Synthesized Software
Sort
View
IWSAS
2000
Springer
14 years 1 months ago
Imposing Real-Time Constraints on Self-Adaptive Controller Synthesis
Abstract. Self-adaptive systems must recon gure themselves, at runtime, to compensate for changing environments, objectives, and system capabilities. This paper discusses how the S...
David J. Musliner
ISIP
2008
IEEE
14 years 4 months ago
FPGA Implementation of an Adaptive Noise Canceller
This paper proposes an FPGA implementation of an Adaptive Noise Canceller using the Least Mean Square (LMS) algorithm. The hardware architecture is synthesized using the Xilinx Sp...
Tian Lan, Jinlin Zhang
MEMOCODE
2005
IEEE
14 years 3 months ago
Synthesis of synchronous assertions with guarded atomic actions
The SystemVerilog standard introduces SystemVerilog Assertions (SVA), a synchronous assertion package based on the temporal-logic semantics of PSL. Traditionally assertions are ch...
Michael Pellauer, Mieszko Lis, Don Baltus, Rishiyu...
ESEM
2007
ACM
14 years 1 months ago
An Empirical Study of the Effects of Gestalt Principles on Diagram Understandability
Comprehension errors in software design must be detected at their origin to avoid propagation into later portions of the software lifecycle and also the final system. This researc...
Krystle Lemon, Edward B. Allen, Jeffrey C. Carver,...
FPL
2004
Springer
205views Hardware» more  FPL 2004»
14 years 3 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...