87 search results - page 4 / 18 » Exploiting Instruction Redundancy for Transient Fault Tolera... |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
The general approach to fault tolerance in uniprocessor systems is to maintain enough time redundancy in the schedule so that any task instance can be re-executed in presence of f...
TCAD
2010
13 years 2 months ago
2010
The structural redundancy inherent to on-chip interconnection networks [networks on chip (NoC)] can be exploited by adaptive routing algorithms in order to provide connectivity eve...
ICCD
2005
IEEE
14 years 1 months ago
2005
IEEE
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
PRDC
2006
IEEE
14 years 1 months ago
2006
IEEE
The general approach to fault tolerance in uniprocessor systems is to use time redundancy in the schedule so that any task instance can be re-executed in presence of faults during...
DATE
2010
IEEE
14 years 17 days ago
2010
IEEE
—Fault tolerance (FT) has become a major concern in computing systems. Instruction duplication has been proposed to verify application execution at run time. Two techniques, inst...