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BMCBI
2011
13 years 2 months ago
DecGPU: distributed error correction on massively parallel graphics processing units using CUDA and MPI
Background: Next-generation sequencing technologies have led to the high-throughput production of sequence data (reads) at low cost. However, these reads are significantly shorter...
Yongchao Liu, Bertil Schmidt, Douglas L. Maskell
IPPS
2003
IEEE
14 years 19 days ago
Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor
Concurrent multithreaded architectures exploit both instruction-level and thread-level parallelism through a combination of branch prediction and thread-level control speculation. ...
Ying Chen, Resit Sendag, David J. Lilja
ICPP
2000
IEEE
13 years 11 months ago
Partial Resolution in Data Value Predictors
Recently, the practice of speculation in resolving data dependences has been studied as a means of extracting more instruction level parallelism (ILP). An outcome of an instructio...
Toshinori Sato, Itsujiro Arita
FTCS
1994
140views more  FTCS 1994»
13 years 8 months ago
Concurrent Error Detection in Self-Timed VLSI
This paper examines architectural techniques for providing concurrent error detection in self-timed VLSI pipelines. Signal pairs from Differential Cascode Voltage Switch Logic are...
David A. Rennels, Hyeongil Kim
CPHYSICS
2006
124views more  CPHYSICS 2006»
13 years 7 months ago
Collision-free spatial hash functions for structural analysis of billion-vertex chemical bond networks
State-of-the-art molecular dynamics (MD) simulations generate massive datasets involving billion-vertex chemical bond networks, which makes data mining based on graph algorithms s...
Cheng Zhang, Bhupesh Bansal, Paulo S. Branicio, Ra...