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ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
14 years 19 days ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
ISCAS
2006
IEEE
106views Hardware» more  ISCAS 2006»
14 years 1 months ago
An efficient SNR scalability coding framework hybrid open-close loop FGS coding
Abstract—This paper presents a novel high-efficient hybrid openclose loop based fine granularity scalable (HOCFGS) coding framework supporting different decoding complexity appli...
Xiangyang Ji, Debin Zhao, Wen Gao, Jizheng Xu, Fen...
PPOPP
1990
ACM
13 years 11 months ago
Employing Register Channels for the Exploitation of Instruction Level Parallelism
Abstract - A multiprocessor system capable of exploiting fine-grained parallelism must support efficient synchronization and data passing mechanisms. This paper demonstrates the us...
Rajiv Gupta
HPCS
2005
IEEE
14 years 1 months ago
A Lightweight, Scalable Grid Computing Framework for Parallel Bioinformatics Applications
Abstract— In recent years our society has witnessed an unprecedented growth in computing power available to tackle important problems in science, engineering and medicine. For ex...
Hans De Sterck, Rob S. Markel, Rob Knight
MVA
2011
234views Computer Vision» more  MVA 2011»
13 years 2 months ago
Feature tracking and matching in video using programmable graphics hardware
Abstract This paper describes novel implementations of the KLT feature tracking and SIFT feature extraction algorithms that run on the graphics processing unit (GPU) and is suitabl...
Sudipta N. Sinha, Jan-Michael Frahm, Marc Pollefey...