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» Exploiting loop-dependent stream reuse for stream processors
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ASPLOS
2010
ACM
14 years 2 months ago
MacroSS: macro-SIMDization of streaming applications
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Ku...
ISPASS
2003
IEEE
14 years 28 days ago
Memory reference reuse latency: Accelerated warmup for sampled microarchitecture simulation
Abstract— This paper proposes to speedup sampled microprocessor simulations by reducing warmup times without sacrificing simulation accuracy. It exploiting the observation that ...
John W. Haskins Jr., Kevin Skadron
APCSAC
2005
IEEE
14 years 1 months ago
An Integrated Partitioning and Scheduling Based Branch Decoupling
Conditional branch induced control hazards cause significant performance loss in modern out-of-order superscalar processors. Dynamic branch prediction techniques help alleviate th...
Pramod Ramarao, Akhilesh Tyagi
ICPP
2000
IEEE
14 years 2 days ago
Simultaneous Multithreading-Based Routers
This work considers the use of a n S M T (simultaneous multithreading) processor in lieu of the conventional processor(s) in a router and evaluates quantitatively the potential ga...
Kemathat Vibhatavanij, Nian-Feng Tzeng, Angkul Kon...
SIGMOD
2005
ACM
177views Database» more  SIGMOD 2005»
14 years 7 months ago
An approach for pipelining nested collections in scientific workflows
We describe an approach for pipelining nested data collections in scientific workflows. Our approach logically delimits arbitrarily nested collections of data tokens using special...
Timothy M. McPhillips, Shawn Bowers