148 search results - page 9 / 30 » Exploiting regularity for low-power design |
NOCS
2007
IEEE
14 years 4 months ago
2007
IEEE
Recent remarkable advances in nanoscale siliconphotonic integrated circuitry specifically compatible with CMOS fabrication have generated new opportunities for leveraging the uni...
ICCAD
1995
IEEE
14 years 1 months ago
1995
IEEE
In a typical design
ow, the design may be altered slightly several times after the initial design cycle according to minor changes in the design speci cation either as a result o...
FPL
2008
Springer
13 years 11 months ago
2008
Springer
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within ...
DAC
2004
ACM
14 years 1 months ago
2004
ACM
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architecture...
CDES
2006
13 years 11 months ago
2006
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...