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» Exploring the multiple-GPU design space
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CDES
2006
184views Hardware» more  CDES 2006»
13 years 11 months ago
Compilation for Future Nanocomputer Architectures
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
Thomas P. Way
SIGCSE
2010
ACM
203views Education» more  SIGCSE 2010»
13 years 10 months ago
An approach to integrating ICTD projects into an undergraduate curriculum
Applying information and communication technologies to development (ICTD) is emerging as an interesting and motivating research area in computer science and engineering. It spans ...
Richard J. Anderson, Ruth E. Anderson, Gaetano Bor...
TCAD
2008
103views more  TCAD 2008»
13 years 10 months ago
Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems
Latency-insensitive protocols allow system-on-chip (SoC) engineers to decouple the design of the computing cores from the design of the intercore communication channels while follo...
Rebecca L. Collins, Luca P. Carloni
DAC
2003
ACM
14 years 3 months ago
Performance trade-off analysis of analog circuits by normal-boundary intersection
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
Guido Stehr, Helmut E. Graeb, Kurt Antreich
SIGGRAPH
1990
ACM
14 years 2 months ago
Rapid controlled movement through a virtual 3D workspace
not abstract asymmetry: different sides looks different clumps different from "data objects" need grid structure, alignment [Design Guidelines for Landmarks to Support Na...
Jock D. Mackinlay, Stuart K. Card, George G. Rober...