There is today little doubt on the fact that a high-performance and cost-effective Network-on-Chip can only be designed in 45nm and beyond under a relaxed synchronization assumpti...
Daniele Ludovici, Alessandro Strano, Georgi Nedelt...
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
Christian Panis, Ulrich Hirnschrott, Gunther Laure...
The paper presents two new approaches to multiobjective design space exploration for parametric VLSI systems. Both considerably reduce the number of simulations needed to determin...
— This paper proposes a multiple-divide technique using by-2, by-3, and by-4 frequency dividers to realize a lower phase-noise LC-VCO, and explores the design space of low-phasen...
This paper shows that it is possible to (1) discover novel implementations of median circuits using evolutionary techniques and (2) find out suitable median circuits in case that ...