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GLOBECOM
2009
IEEE
13 years 11 months ago
On-Chip Integrated Antenna Structures in CMOS for 60 GHz WPAN Systems
Abstract--This paper presents several on-chip antenna structures that may be fabricated with standard CMOS technology for use at millimeter wave frequencies. On-chip antennas for w...
Felix Gutierrez Jr., Kristen Parrish, Theodore S. ...
CODES
2003
IEEE
14 years 1 months ago
Programmers' views of SoCs
System-on-chip (SoC) designs have the potential to change the way we organize computation. This potential has gone unrealized. Future SoCs will have multiple heterogeneous process...
JoAnn M. Paul
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
14 years 2 months ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...
DATE
2007
IEEE
105views Hardware» more  DATE 2007»
14 years 2 months ago
Understanding voltage variations in chip multiprocessors using a distributed power-delivery network
— Recent efforts to address microprocessor power dissipation through aggressive supply voltage scaling and power management require that designers be increasingly cognizant of po...
Meeta Sharma Gupta, Jarod L. Oatley, Russ Joseph, ...
CF
2007
ACM
13 years 11 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...