System-on-chip (SoC) designs have the potential to change the way we organize computation. This potential has gone unrealized. Future SoCs will have multiple heterogeneous processing elements, most likely organized around an on-chip network. Thus, SoCs are increasingly modeled as systems in the large. But a chip also has a fixed set of programmable hardware elements that are much more closely coupled than for systems in the large. New application types will require the chip to be considered programmable along with the individual processing elements on the chip. New programmers’ views of SoCs are required to capture this new design space. A set of primitives for next generation design languages that support the development of new programmers’ views of SoCs is motivated. Categories and Subject Descriptors C.0 [Computer Systems Organization]: General – hardware/ software interfaces. General Terms Performance, Design, Languages. Keywords Design Languages, Heterogeneous Multiprocessi...
JoAnn M. Paul