276 search results - page 17 / 56 » Extremely Low-Power Logic |
ASPDAC
2010
ACM
13 years 5 months ago
2010
ACM
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enabl...
ISQED
2007
IEEE
14 years 1 months ago
2007
IEEE
Straining of silicon improves mobility of carriers resulting in speed enhancement for transistors in CMOS technology. Traditionally, silicon straining is applied in a similar ad-h...
ISVLSI
2002
IEEE
14 years 15 days ago
2002
IEEE
Timed Shannon circuits have been proposed as a synthesis approach for a low power optimization technique at the logic level since overall circuit switching probabilities may be re...
BIRTHDAY
2003
Springer
14 years 25 days ago
2003
Springer
One of the central axioms of extreme programming is the disciplined use of regression testing during stepwise software development. Due to recent progress in software model checkin...
WH
2010
13 years 2 months ago
2010
In this work, we consider low power, wearable pulse oximeter sensors for ambulatory, remote vital signs monitoring applications. It is extremely important for such sensors to main...