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» FADIC: Architectural Synthesis applied in IC Design
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DAC
2006
ACM
14 years 8 months ago
Optimization of area under a delay constraint in digital filter synthesis using SAT-based integer linear programming
In this paper, we propose an exact algorithm for the problem of area optimization under a delay constraint in the synthesis of multiplierless FIR filters. To the best of our knowl...
Eduardo A. C. da Costa, José Monteiro, Leve...
DAC
2005
ACM
14 years 8 months ago
Power-aware placement
Lowering power is one of the greatest challenges facing the IC industry today. We present a power-aware placement method that simultaneously performs (1) activity-based register c...
Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sher...
DAC
1997
ACM
13 years 11 months ago
Multi-Way FPGA Partitioning by Fully Exploiting Design Hierarchy
In this paper, we present a new integrated synthesis and partitioning method for multiple-FPGA applications. This method rst synthesizes a design speci cation in a ne-grained way ...
Wen-Jong Fang, Allen C.-H. Wu
DAC
2000
ACM
14 years 8 months ago
Impact of interconnect variations on the clock skew of a gigahertz microprocessor
Due to the large die sizes and tight relative clock skew margins, the impact of interconnect manufacturing variations on the clock skew in today's gigahertz microprocessors c...
Ying Liu, Sani R. Nassif, Lawrence T. Pileggi, And...
DAC
1999
ACM
14 years 8 months ago
Synthesis of Embedded Software Using Free-Choice Petri Nets
Software synthesis from a concurrent functional specification is a key problem in the design of embedded systems. A concurrent specification is well-suited for medium-grained part...
Marco Sgroi, Luciano Lavagno