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ICPP
1996
IEEE
14 years 24 days ago
Restructuring Programs for High-Speed Computers with Polaris
The ability to automatically parallelize standard programming languages results in program portability across a wide range of machine architectures. It is the goal of the Polaris ...
William Blume, Rudolf Eigenmann, Keith Faigin, Joh...
FPGA
2000
ACM
145views FPGA» more  FPGA 2000»
14 years 7 days ago
A C compiler for a processor with a reconfigurable functional unit
This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that c...
Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerje...
IPPS
2003
IEEE
14 years 1 months ago
ECO: An Empirical-Based Compilation and Optimization System
In this paper, we describe a compilation system that automates much of the process of performance tuning that is currently done manually by application programmers interested in h...
Nastaran Baradaran, Jacqueline Chame, Chun Chen, P...
IFIPPACT
1994
13 years 10 months ago
Microcode Generation for Flexible Parallel Target Architectures
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...
Rainer Leupers, Wolfgang Schenk, Peter Marwedel
MICRO
2000
IEEE
133views Hardware» more  MICRO 2000»
14 years 1 months ago
Compiler controlled value prediction using branch predictor based confidence
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
Eric Larson, Todd M. Austin