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» FPGA interconnect design using logical effort
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TCAD
2002
134views more  TCAD 2002»
13 years 7 months ago
Testing and diagnosis of interconnect faults in cluster-based FPGA architectures
As IC densities are increasing, cluster-based FPGA architectures are becoming the architecture of choice for major FPGA manufacturers. A cluster-based architecture is one in which...
Ian G. Harris, Russell Tessier
FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
14 years 21 days ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong
FPGA
2007
ACM
114views FPGA» more  FPGA 2007»
14 years 1 months ago
Design of a logic element for implementing an asynchronous FPGA
A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
Scott C. Smith
FPGA
2006
ACM
141views FPGA» more  FPGA 2006»
13 years 11 months ago
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
Dmitri B. Strukov, Konstantin Likharev
ARC
2007
Springer
116views Hardware» more  ARC 2007»
14 years 1 months ago
Systematic Customization of On-Chip Crossbar Interconnects
Abstract. In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identic...
Jae Young Hur, Todor Stefanov, Stephan Wong, Stama...