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103
Voted
ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
15 years 7 months ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien
121
Voted
ASC
2004
15 years 2 months ago
Efficient fuzzy compiler for SIMD architectures
Abstract. This paper presents a real-time full-programmable fuzzy compiler based on piecewise linear interpolation techniques designed to be executed in SIMD (Single Instruction Mu...
Enrique Frías-Martínez, Julio Guti&e...
ICPP
1993
IEEE
15 years 6 months ago
Activity Counter: New Optimization for the Dynamic Scheduling of SIMD Control Flow
SIMD or vector computers and collection-oriented languages, like C , are designed to perform the same computation on each data item or on just a subset of the data. Subsets of pro...
Ronan Keryell, Nicolas Paris
MICRO
1998
IEEE
108views Hardware» more  MICRO 1998»
15 years 6 months ago
Exploiting Instruction Level Parallelism in Geometry Processing for Three Dimensional Graphics Applications
Three dimensional (3D) graphics applications have become very important workloads running on today's computer systems. A cost-effective graphics solution is to perform geomet...
Chia-Lin Yang, Barton Sano, Alvin R. Lebeck
ICS
2009
Tsinghua U.
15 years 9 months ago
High-performance regular expression scanning on the Cell/B.E. processor
Matching regular expressions (regexps) is a very common workload. For example, tokenization, which consists of recognizing words or keywords in a character stream, appears in ever...
Daniele Paolo Scarpazza, Gregory F. Russell