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DATE
2007
IEEE
107views Hardware» more  DATE 2007»
14 years 2 months ago
Development of an ASIP enabling flows in ethernet access using a retargetable compilation flow
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
K. Van Renterghem, P. Demuytere, Dieter Verhulst, ...
ICCD
2004
IEEE
158views Hardware» more  ICCD 2004»
14 years 5 months ago
An Embedded Reconfigurable SIMD DSP with Capability of Dimension-Controllable Vector Processing
A programmable parallel digital signal processor (DSP) core for embedded applications is presented which combines the concepts of single instruction stream over multiple data stre...
Liang Han, Jie Chen, Chaoxian Zhou, Ying Li, Xin Z...
APPT
2009
Springer
14 years 3 months ago
Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices
SIMD extension is one of the most common and effective technique to exploit data-level parallelism in today’s processor designs. However, the performance of SIMD architectures i...
Asadollah Shahbahrami, Ben H. H. Juurlink
HPCC
2005
Springer
14 years 2 months ago
Efficient SIMD Numerical Interpolation
This paper reports the results of SIMD implementation of a number of interpolation algorithms on common personal computers. These methods fit a curve on some given input points for...
Hossein Ahmadi, Maryam Moslemi Naeini, Hamid Sarba...
IPPS
1999
IEEE
14 years 26 days ago
Real-Time Image Processing on a Focal Plane SIMD Array
Real-time image processing applications have tremendous computational workloads and I/O throughput requirements. Operation in mobile, portable devices poses stringent resource limi...
Antonio Gentile, José Cruz-Rivera, D. Scott...