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DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 5 months ago
MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues
—Nonvolatile logic-in-memory architecture, where nonvolatile memory elements are distributed over a logic-circuit plane, is expected to realize both ultra-low-power and reduced i...
Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuy...
JIIS
2002
99views more  JIIS 2002»
13 years 10 months ago
Efficient Management of Persistent Knowledge
Although computer speed has steadily increased and memory is getting cheaper, the need for storage managers to deal efficiently with applications that cannot be held into main memo...
Dimitris G. Kapopoulos, Michael Hatzopoulos, Panag...
HPCA
2011
IEEE
13 years 2 months ago
A new server I/O architecture for high speed networks
Traditional architectural designs are normally focused on CPUs and have been often decoupled from I/O considerations. They are inefficient for high-speed network processing with a...
Guangdeng Liao, Xia Znu, Laxmi N. Bhuyan
PODC
2010
ACM
14 years 2 months ago
The multiplicative power of consensus numbers
: The Borowsky-Gafni (BG) simulation algorithm is a powerful reduction algorithm that shows that t-resilience of decision tasks can be fully characterized in terms of wait-freedom....
Damien Imbs, Michel Raynal
HPCA
1998
IEEE
14 years 3 months ago
The Effectiveness of SRAM Network Caches in Clustered DSMs
The frequency of accesses to remote data is a key factor affecting the performance of all Distributed Shared Memory (DSM) systems. Remote data caching is one of the most effective...
Adrian Moga, Michel Dubois