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ICCAD
2000
IEEE
109views Hardware» more  ICCAD 2000»
14 years 2 months ago
Latency-Guided On-Chip Bus Network Design
Abstract— Deep submicron technology scaling has two major ramifications on the design process. First, reduced feature size significantly increases wire delay, thus resulting in...
Milenko Drinic, Darko Kirovski, Seapahn Meguerdich...
ICEIS
2000
IEEE
14 years 2 months ago
University Information System Fully Based on WWW
This paper describes the development of Information System (IS) at Masaryk University in Brno. It supports full range of administrative and information functions in the study area,...
Jan Pazdziora, Michal Brandejs
INFOCOM
2000
IEEE
14 years 2 months ago
Data Broadcasting and Seamless Channel Transition for Highly-Demanded Videos
—One way to broadcast a popular video is to use a number of dedicated channels, each responsible for broadcasting some portion of the video periodically in a predefined way. The ...
Yu-Chee Tseng, Chi-Ming Hsieh, Ming-Hour Yang, Wen...
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
14 years 2 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
ISSRE
2000
IEEE
14 years 2 months ago
Evaluation of Regressive Methods for Automated Generation of Test Trajectories
Automated generation of test cases is a prerequisite for fast testing. Whereas the research has addressed the creation of individual test points, test trajectoiy generation has at...
Brian J. Taylor, Bojan Cukic
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