406 search results - page 44 / 82 » Fast Increment Registers |
144
Voted
VTC
2008
IEEE
15 years 10 months ago
2008
IEEE
Abstract—NCTUns is a novel network simulator and emulator that has many unique features over traditional network simulators and emulators. It is an open-source software running o...
117
Voted
ASYNC
2007
IEEE
15 years 10 months ago
2007
IEEE
A high data rate asynchronous bit-serial link for long-range on-chip communication is presented. The data bit cycle time is equal to a single gate delay, enabling 67Gbps throughpu...
104
Voted
DATE
2007
IEEE
15 years 10 months ago
2007
IEEE
Characterizing setup/hold times of latches and registers, a crucial component for achieving timing closure of large digital designs, typically occupies months of computation in in...
130
click to vote
SIES
2007
IEEE
15 years 9 months ago
2007
IEEE
— High level synthesis is one of the next major steps to improve the hw/sw co-design process. The advantages of high nthesis are two-fold. At first the level of abstraction is r...
125
Voted
CHES
2004
Springer
15 years 9 months ago
2004
Springer
Abstract. In this article we present a low-cost coprocessor for smartcards which supports all necessary mathematical operations for a fast calculation of the Elliptic Curve Digital...