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ICCAD
2002
IEEE
106views Hardware» more  ICCAD 2002»
14 years 4 months ago
Throughput-driven IC communication fabric synthesis
As the scale of system integration continues to grow, the on-chip communication becomes the ultimate bottleneck of system performance and the primary determinant of system archite...
Tao Lin, Lawrence T. Pileggi
ICNP
1998
IEEE
13 years 11 months ago
A State Management Protocol for IntServ, DiffServ and Label Switching
Providing Quality of Service (QOS) in an efficient and scalable manner in the Internet is a topic of active research. The technologies that have drawn the most attention are Integ...
Hari Adiseshu, Guru M. Parulkar, Raj Yavatkar
DAC
2005
ACM
13 years 9 months ago
How accurately can we model timing in a placement engine?
This paper presents a novel placement algorithm for timing optimization based on a new and powerful concept, which we term differential timing analysis. Recognizing that accurate ...
Amit Chowdhary, Karthik Rajagopal, Satish Venkates...
DAC
2008
ACM
14 years 8 months ago
DeFer: deferred decision making enabled fixed-outline floorplanner
In this paper, we present DeFer -- a fast, high-quality and nonstochastic fixed-outline floorplanning algorithm. DeFer generates a non-slicing floorplan by compacting a slicing fl...
Jackey Z. Yan, Chris Chu
MICRO
2009
IEEE
148views Hardware» more  MICRO 2009»
14 years 2 months ago
Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
Sangyeun Cho, Hyunjin Lee