Sciweavers

610 search results - page 95 / 122
» Fast Modular Reduction
Sort
View
AOSD
2008
ACM
13 years 9 months ago
Edicts: implementing features with flexible binding times
In a software product line, the binding time of a feature is the time at which one decides to include or exclude a feature from a product. Typical binding site implementations are...
Venkat Chakravarthy, John Regehr, Eric Eide
EDCC
2008
Springer
13 years 9 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...
TC
2011
13 years 2 months ago
StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs
—CMOS scaling has long been a source of dramatic performance gains. However, semiconductor feature size reduction has resulted in increasing levels of operating temperatures and ...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
ICIP
1998
IEEE
14 years 9 months ago
B-spline Snakes and a JAVA Interface: An Intuitive Tool for General Contour Outlining
We present a novel formulation for B-spline snakes that can be used as a tool for fast and intuitive contour outlining. The theory is implemented in a platform independent JAVA in...
Patrick Brigger, Robert Engel, Michael Unser
ICDE
2002
IEEE
209views Database» more  ICDE 2002»
14 years 8 months ago
Geometric-Similarity Retrieval in Large Image Bases
We propose a novel approach to shape-based image retrieval that builds upon a similarity criterion which is based on the average point set distance. Compared to traditional techni...
Ioannis Fudos, Leonidas Palios, Evaggelia Pitoura