522 search results - page 18 / 105 » Fast Smith-Waterman hardware implementation |
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
ICCD
1997
IEEE
13 years 12 months ago
1997
IEEE
In this paper, we present a parallel-array implementation of a new non-restoring square root algorithm (PASQRT). The carry-save adder (CSA) is used in the parallel array. The PASQ...
MICRO
2009
IEEE
14 years 2 months ago
2009
IEEE
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
VTS
2005
IEEE
14 years 1 months ago
2005
IEEE
A new method for test resource partitioning is introduced which keeps the design-for-test logic independent of the test set and moves the test pattern dependent information to an ...
GECCO
2009
Springer
14 years 9 days ago
2009
Springer
Previously either due to hardware GPU limits or older versions of software, careful implementation of PRNGs was required to make good use of the limited numerical precision availa...