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HPCA
1998
IEEE
13 years 12 months ago
Address Translation Mechanisms In Network Interfaces
Good network hardware performance is often squandered by overheads for accessing the network interface (NI) within a host. NIs that support user-level messaging avoid frequent ope...
Ioannis Schoinas, Mark D. Hill
ICIP
2009
IEEE
14 years 8 months ago
Memory-less Bit-plane Coder Architecture For Jpeg2000 With Concurrent Column-stripe Coding
In implementing an efficient block coder for JPEG2000, the memories required for storing the state variables dominate the hardware cost of a block coder. In this paper, we propose...
ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
14 years 4 months ago
Power switch characterization for fine-grained dynamic voltage scaling
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
Liang Di, Mateja Putic, John Lach, Benton H. Calho...
ICCD
2003
IEEE
127views Hardware» more  ICCD 2003»
14 years 4 months ago
Structural Detection of Symmetries in Boolean Functions
Functional symmetries provide significant benefits for multiple tasks in synthesis and verification. Many applications require the manual specification of symmetries using spe...
Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangi...
ICCAD
2001
IEEE
185views Hardware» more  ICCAD 2001»
14 years 4 months ago
Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis
1 - This paper presents an efficient design exploration environment for high-end core processors. The heart of the proposed design exploration framework is a two-level simulation e...
Diana Marculescu, Anoop Iyer