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BMCBI
2008
116views more  BMCBI 2008»
13 years 7 months ago
The combination approach of SVM and ECOC for powerful identification and classification of transcription factor
Background: Transcription factors (TFs) are core functional proteins which play important roles in gene expression control, and they are key factors for gene regulation network co...
Guangyong Zheng, Ziliang Qian, Qing Yang, Chaochun...
ISCAS
2007
IEEE
179views Hardware» more  ISCAS 2007»
14 years 1 months ago
Analysis for Signal and Power Integrity Using the Multilayered Finite Difference Method
— We present a method for fast analysis of signal and power integrity based on a recently developed multilayered finite difference method (M-FDM). In order to accurately model m...
Ege Engin, Krishna Bharath, Madhavan Swaminathan
GLVLSI
2003
IEEE
185views VLSI» more  GLVLSI 2003»
14 years 22 days ago
Noise tolerant low voltage XOR-XNOR for fast arithmetic
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
Mohamed A. Elgamel, Sumeer Goel, Magdy A. Bayoumi
ISSAC
1999
Springer
86views Mathematics» more  ISSAC 1999»
13 years 11 months ago
How Fast Can We Compute Products?
In this paper we consider the problem of fast computation of n-ary products, for large n, over arbitrary precision integer or rational number domains. The combination of loop unro...
V. Kislenkov, V. Mitrofanov, Eugene V. Zima
ARVLSI
2001
IEEE
289views VLSI» more  ARVLSI 2001»
13 years 11 months ago
A High-Performance 64-bit Adder Implemented in Output Prediction Logic
Output Prediction Logic (OPL) is a technique that can be applied to conventional CMOS logic families to obtain considerable speedups. When applied to static CMOS, OPL retains the ...
Sheng Sun, Larry McMurchie, Carl Sechen