64 search results - page 4 / 13 » Fast and Precise Power Prediction for Combinational Circuits |
ASPDAC
2004
ACM
14 years 27 days ago
2004
ACM
Congestion estimation is an important issue for the success of the VLSI layout. Fast congestion estimation provides an efficient means to adjust the placement and wire planning. A...
PATMOS
2004
Springer
14 years 24 days ago
2004
Springer
Basic combinational gates, including NAND, NOR and XOR, are fundamental building blocks in CMOS digital circuits. This paper analyses and compares the power consumption due to tran...
GLVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
Parallel counters are key elements in many arithmetic circuits, especially fast multipliers. In this paper, novel architectures and designs for high speed, low power (3, 2), (7, 3...
NIPS
2004
2004
Methods for Estimating the Computational Power and Generalization Capability of Neural Microcircuits
13 years 8 months ago
What makes a neural microcircuit computationally powerful? Or more precisely, which measurable quantities could explain why one microcircuit C is better suited for a particular fa...
DAC
2008
ACM
13 years 9 months ago
2008
ACM
Clock skew scheduling has been traditionally considered as a tool for improving the clock period in a sequential circuit. Timing slack is "stolen" from fast combinationa...