Sciweavers

103 search results - page 16 / 21
» Fast placement approaches for FPGAs
Sort
View
FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
14 years 23 days ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
CASES
2003
ACM
13 years 11 months ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna
ISPD
2005
ACM
174views Hardware» more  ISPD 2005»
14 years 28 days ago
Fast and accurate rectilinear steiner minimal tree algorithm for VLSI design
In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT)1 algorithm called FLUTE. The algorithm is an extension of the wirelength estimation appr...
Chris C. N. Chu, Yiu-Chung Wong
ISMM
2011
Springer
12 years 10 months ago
Surface Reconstruction Using Power Watershed
Abstract. Surface reconstruction from a set of noisy point measurements has been a well studied problem for several decades. Recently, variational and discrete optimization approac...
Camille Couprie, Xavier Bresson, Laurent Najman, H...
DAC
2006
ACM
14 years 8 months ago
Fast algorithms for slew constrained minimum cost buffering
As a prevalent constraint, sharp slew rate is often required in circuit design which causes a huge demand for buffering resources. This problem requires ultra-fast buffering techn...
Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K...