Sciweavers

73 search results - page 7 / 15
» Fast prototyping of reconfigurable architectures from a C pr...
Sort
View
CODES
2003
IEEE
14 years 20 days ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa
FCCM
2000
IEEE
122views VLSI» more  FCCM 2000»
13 years 11 months ago
Evaluating Hardware Compilation Techniques
Hardware compilation techniques which use highlevel programming languages to describe and synthesize hardware are gaining popularity. They are especially useful for reconfigurable...
Markus Weinhardt, Wayne Luk
IPPS
2006
IEEE
14 years 1 months ago
Algorithmic skeletons for stream programming in embedded heterogeneous parallel image processing applications
Algorithmic skeletons can be used to write architecture independent programs, shielding application developers from the details of a parallel implementation. In this paper, we pre...
Wouter Caarls, Pieter P. Jonker, Henk Corporaal
EUROPAR
2000
Springer
13 years 11 months ago
BitValue Inference: Detecting and Exploiting Narrow Bitwidth Computations
We present a compiler algorithm called BitValue, which can discover both unused and constant bits in dusty-deck C programs. BitValue uses forward and backward dataflow analyses, ge...
Mihai Budiu, Majd Sakr, Kip Walker, Seth Copen Gol...
CODES
2007
IEEE
14 years 1 months ago
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
Mark Thompson, Hristo Nikolov, Todor Stefanov, And...