This paper presents a tool that (i) constructs tree-based models of a program’s behavior during testing and (ii) employs these trees while reordering and reducing a test suite. ...
Adam M. Smith, Joshua Geiger, Gregory M. Kapfhamme...
Test vector ordering is recognized as a simple and non-intrusive approach to assist test power reduction. Simulation based test vector ordering approach to minimize circuit transit...
We prove the existence of small core-sets for solving approximate k-center clustering and related problems. The size of these core-sets is considerably smaller than the previously...
With the advent of nanometer technologies, the design size of integrated circuits is getting larger and the operation speed is getting faster. As a consequence, test cost is becom...
— The purpose of this study is to maintain efficient backup routes for restoring overlay trees. In most conventional methods, after a node leaves the trees, its children start se...