281 search results - page 32 / 57 » Fastpath Speculative Parallelization |
HPCA
2001
IEEE
14 years 10 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
ICS
2003
Tsinghua U.
14 years 3 months ago
2003
Tsinghua U.
Communication latencies within critical sections constitute a major bottleneck in some classes of emerging parallel workloads. In this paper, we argue for the use of Inferentially...
HPCA
2002
IEEE
14 years 10 months ago
2002
IEEE
Several studies of speculative execution based on values have reported promising performance potential. However, virtually all microarchitectures in these studies were described i...
HPCA
2001
IEEE
14 years 10 months ago
2001
IEEE
This paper introduces a router delay model that accurately models key aspects of modern routers. The model accounts for the pipelined nature of contemporary routers, the specific ...
HPCA
2008
IEEE
14 years 4 months ago
2008
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...