47 search results - page 6 / 10 » Fault Tolerant System Design Method Based on Self-Checking C... |
ISQED
2002
IEEE
14 years 9 days ago
2002
IEEE
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
FPGA
2005
ACM
14 years 28 days ago
2005
ACM
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
CF
2004
ACM
14 years 25 days ago
2004
ACM
This paper discusses fault-tolerant techniques for SRAM-based FPGAs. These techniques can be based on circuit level modifications, with obvious modifications in the programmable a...
GI
2004
Springer
14 years 24 days ago
2004
Springer
: The transition from microelectronics to nanoelectronics reaches physical limits and results in a paradigm shift in the design and fabrication of electronic circuits. The conserva...
CODES
2009
IEEE
14 years 2 months ago
2009
IEEE
Time redundancy (rollback-recovery) and hardware redundancy are commonly used in real-time systems to achieve fault tolerance. From an energy consumption point of view, time redun...