32 search results - page 4 / 7 » Fault modeling and simulation for crosstalk in system-on-chi... |
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
In this paper, we present a test pattern generation algorithm aiming at signal integrity faults on long interconnects. This is achieved by considering the effect of inputs and par...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
We revisit a basic element of modern signal integrity analysis, the modeling of worst-case coupling capacitance effects within a switch factor (SF) based methodology. We show that...
ASIAMS
2007
IEEE
14 years 1 months ago
2007
IEEE
Simulation is perhaps the most cost-effective tool to evaluate the operation of a system under design. A flexible, easy to extend, fully object-oriented, and multilayered simulato...
3DIC
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
Current source based cell models are becoming a necessity for accurate timing and noise analysis at 65nm and below. Voltage waveform shapes are increasingly more difficult to repr...