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» Fault simulation on reconfigurable hardware
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DATE
2002
IEEE
126views Hardware» more  DATE 2002»
14 years 2 months ago
Automated Modeling of Custom Digital Circuits for Test
Models meant for logic verification and simulation are often used for ATPG. For custom digital circuits, these models contain many tristate devices, which leads to lower fault co...
Soumitra Bose
SIES
2010
IEEE
13 years 7 months ago
Distributed Coordination of Task Migration for Fault-Tolerant FlexRay Networks
In this paper we present an approach to increase the fault tolerance in FlexRay networks by introducing backup nodes to replace defect ECUs (Electronic Control Units). In order to ...
Kay Klobedanz, Gilles B. Defo, Wolfgang Mülle...
ASPLOS
2008
ACM
13 years 11 months ago
Adapting to intermittent faults in multicore systems
Future multicore processors will be more susceptible to a variety of hardware failures. In particular, intermittent faults, caused in part by manufacturing, thermal, and voltage v...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
DFT
2007
IEEE
109views VLSI» more  DFT 2007»
14 years 3 months ago
Safety Evaluation of NanoFabrics
Chemically Assembled Electronic Nanotechnology is a promising alternative to CMOS fabrication. In particular, the nanoFabric has proven to be a viable solution for implementing di...
Michelangelo Grosso, Maurizio Rebaudengo, Matteo S...
CODES
2010
IEEE
13 years 5 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...