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» Fault simulation on reconfigurable hardware
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PACS
2000
Springer
99views Hardware» more  PACS 2000»
14 years 22 days ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar
DFT
2003
IEEE
106views VLSI» more  DFT 2003»
14 years 2 months ago
Techniques for Transient Fault Sensitivity Analysis and Reduction in VLSI Circuits
Transient faults in VLSI circuits could lead to disastrous consequences. With technology scaling, circuits are becoming increasingly vulnerable to transient faults. This papers pr...
Atul Maheshwari, Israel Koren, Wayne Burleson
DATE
2000
IEEE
90views Hardware» more  DATE 2000»
14 years 1 months ago
Cost Reduction and Evaluation of a Temporary Faults Detecting Technique
: IC technologies are approaching the ultimate limits of silicon in terms of channel width, power supply and speed. By approaching these limits, circuits are becoming increasingly ...
Lorena Anghel, Michael Nicolaidis
ERSA
2006
100views Hardware» more  ERSA 2006»
13 years 10 months ago
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems
Current FPGAs are heterogeneous partially reconfigurable architectures, consisting of several resource types, e. g., logic cells and embedded memory. By using partial reconfigurat...
Markus Koester, Heiko Kalte, Mario Porrmann
ISLPED
2010
ACM
181views Hardware» more  ISLPED 2010»
13 years 7 months ago
Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems
 In this paper, a novel thermal-aware dynamic placement planner for reconfigurable systems is presented, which targets transient temperature reduction. Rather than solving time-...
Shahin Golshan, Eli Bozorgzadeh, Benjamin Carri&oa...