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» Features of Future Network Processor Architectures
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SIGMETRICS
1997
ACM
111views Hardware» more  SIGMETRICS 1997»
13 years 11 months ago
Cache Behavior of Network Protocols
In this paper we present a performance study of memory reference behavior in network protocol processing, using an Internet-based protocol stack implemented in the x-kernel runnin...
Erich M. Nahum, David J. Yates, James F. Kurose, D...
DATE
2007
IEEE
125views Hardware» more  DATE 2007»
14 years 2 months ago
Simulation platform for UHF RFID
1 Developing modern integrated and embedded systems require well-designed processes to ensure flexibility and independency. These features are related to exchangeability of hardw...
Vojtech Derbek, Christian Steger, Reinhold Weiss, ...
HPCA
1999
IEEE
13 years 12 months ago
The Synergy of Multithreading and Access/Execute Decoupling
This work presents and evaluates a novel processor microarchitecture which combines two paradigms: access/ execute decoupling and simultaneous multithreading. We investigate how b...
Joan-Manuel Parcerisa, Antonio González
TVLSI
2008
152views more  TVLSI 2008»
13 years 7 months ago
MMV: A Metamodeling Based Microprocessor Validation Environment
With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
SIGCOMM
2009
ACM
14 years 2 months ago
A programmable, generic forwarding element approach for dynamic network functionality
Communication networks are growing exponentially, and new services and applications are being introduced unceasingly. To meet the demands of these services and applications, curre...
Ran Giladi, Niv Yemini