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» Features of Future Network Processor Architectures
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FPL
2003
Springer
128views Hardware» more  FPL 2003»
14 years 25 days ago
A Generic Architecture for Integrated Smart Transducers
Abstract. A smart transducer network hosts various nodes with different functionality. Our approach offers the possibility to design different smart transducer nodes as a system...
Martin Delvai, Ulrike Eisenmann, Wilfried Elmenrei...
ISCA
1999
IEEE
88views Hardware» more  ISCA 1999»
13 years 12 months ago
Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions
This paper aims to provide a quantitative understanding of the performance of image and video processing applications on general-purpose processors, without and with media ISA ext...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...
DSN
2004
IEEE
13 years 11 months ago
The Recursive NanoBox Processor Grid: A Reliable System Architecture for Unreliable Nanotechnology Devices
Advanced molecular nanotechnology devices are expected to have exceedingly high transient fault rates and large numbers of inherent device defects compared to conventional CMOS de...
A. J. KleinOsowski, Kevin KleinOsowski, Vijay Rang...
ICDS
2009
IEEE
14 years 2 months ago
Security and User Guidelines for the Design of the Future Networked Systems
—Emergence of new networking technologies and paradigms provides users multitude of ways to communicate with each others and exchange information irrespective of time and place. ...
Seppo Heikkinen, Sari Kinnari, Kari Heikkinen
FIW
2003
120views Communications» more  FIW 2003»
13 years 9 months ago
A Policy Architecture for Enhancing and Controlling Features
Abstract. Features provide extensions to a basic service, but in new systems users require much greater flexibility oriented towards their needs. Traditional features do not easil...
Stephan Reiff-Marganiec, Kenneth J. Turner