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» Filtering, FDR and power
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ISLPED
2010
ACM
169views Hardware» more  ISLPED 2010»
13 years 7 months ago
TurboTag: lookup filtering to reduce coherence directory power
On-chip coherence directories of today's multi-core systems are not energy efficient. Coherence directories dissipate a significant fraction of their power on unnecessary loo...
Pejman Lotfi-Kamran, Michael Ferdman, Daniel Crisa...
TVLSI
2008
111views more  TVLSI 2008»
13 years 7 months ago
GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch Filtering
This paper describes Glitchless, a circuit-level technique for reducing power in FPGAs by eliminating unnecessary logic transitions called glitches. This is done by adding program...
Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
ISCAS
2007
IEEE
75views Hardware» more  ISCAS 2007»
14 years 1 months ago
State-Space Analysis of Power Complementary Analog Filters
Abstract— This paper presents a new analysis of power complementary analog filters using the state-space representation. Our analysis is based on the bounded-real Riccati equati...
Shunsuke Koshita, Masahide Abe, Masayuki Kawamata
DSD
2004
IEEE
132views Hardware» more  DSD 2004»
13 years 11 months ago
Dynamic Filter Cache for Low Power Instruction Memory Hierarchy
Filter cache(FC) is effective in achieving energy saving at the expense of some performance degradation. The energy savings, here, comes from repeated execution of tiny loops from...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
ISCAS
2002
IEEE
141views Hardware» more  ISCAS 2002»
14 years 14 days ago
Power characterization of digital filters implemented on FPGA
The evaluation of power consumption in complex digital systems is a hard task that normally requires long simulation time and complicated models. In this work, we obtain power con...
Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nann...