107 search results - page 16 / 22 » Finding optimal hardware software partitions |
CODES
2000
IEEE
13 years 11 months ago
2000
IEEE
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
ICCD
2008
IEEE
14 years 3 months ago
2008
IEEE
—This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is desi...
CAINE
2006
13 years 8 months ago
2006
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
ISHPC
2003
Springer
13 years 12 months ago
2003
Springer
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...
ICCAD
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper proposes an optimum methodology for assigning supply and threshold voltages to modules in a CMOS circuit such that the overall energy consumption is minimized for a giv...