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» Finding optimal hardware software partitions
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CASES
2003
ACM
13 years 12 months ago
Polynomial-time algorithm for on-chip scratchpad memory partitioning
Focusing on embedded applications, scratchpad memories (SPMs) look like a best-compromise solution when taking into account performance, energy consumption and die area. The main ...
Federico Angiolini, Luca Benini, Alberto Caprara
CSB
2004
IEEE
123views Bioinformatics» more  CSB 2004»
13 years 10 months ago
A New Hardware Architecture for Genomic and Proteomic Sequence Alignment
We describe a novel hardware architecture for genomic and proteomic sequence alignment which achieves a speed-up of two to three orders of magnitude over Smith-Waterman dynamic pr...
Greg Knowles, Paul Gardner-Stephen
HPCA
2008
IEEE
14 years 7 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
MICRO
2012
IEEE
231views Hardware» more  MICRO 2012»
11 years 9 months ago
What is Happening to Power, Performance, and Software?
The past 10 years have delivered two significant revolutions. (1) Microprocessor design has been transformed by the limits of chip power, wire latency, and Dennard scaling—leadi...
Hadi Esmaeilzadeh, Ting Cao, Xi Yang, Stephen Blac...
CODES
2006
IEEE
14 years 23 days ago
Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study
Virtual platform (ViP), or ESL (Electronic System Level) simulation model, is one of the most widely renowned system level design techniques. In this paper, we present a case stud...
Sungpack Hong, Sungjoo Yoo, Sheayun Lee, Sangwoo L...