Sciweavers

103 search results - page 8 / 21
» Fine-grained power management for multithreaded processor co...
Sort
View
WORDS
2003
IEEE
14 years 29 days ago
Scalable Online Feasibility Tests for Admission Control in a Java Real-Time System
In the Komodo project a real-time Java system based on a multithreaded Java microcontroller has been developed. A main scheduling policy realized by hardware in the microcontroller...
Uwe Brinkschulte
MICRO
2009
IEEE
113views Hardware» more  MICRO 2009»
14 years 2 months ago
The BubbleWrap many-core: popping cores for sequential acceleration
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...
Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
14 years 2 months ago
Mapping the physical layer of radio standards to multiprocessor architectures
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
Cyprian Grassmann, Mathias Richter, Mirko Sauerman...
SECON
2007
IEEE
14 years 2 months ago
A SoC-based Sensor Node: Evaluation of RETOS-enabled CC2430
—Recent progress in Wireless Sensor Networks technology has enabled many complicated real-world applications. Some of the applications demand a non-trivial amount of computation;...
Sukwon Choi, Hojung Cha, SungChil Cho
FCCM
1999
IEEE
122views VLSI» more  FCCM 1999»
14 years 16 hour ago
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
Technology scaling of CMOS processes brings relatively faster transistors (gates) and slower interconnects (wires), making viable the addition of reconfigurability to increase per...
Andrew A. Chien, Jay H. Byun