73 search results - page 3 / 15 » First Steps in the Verified Software Grand Challenge |
SPLC
2008
13 years 10 months ago
2008
The automated analysis of Feature Models (FMs) focuses on the usage of different logic paradigms and solvers to implement a number of analysis operations on FMs. The implementatio...
FAC
2008
13 years 8 months ago
2008
This paper describes how the communication protocol of Mondex electronic purses can be specified and verified against desired security properties. The specification is developed by...
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
ACL2
2006
ACM
14 years 2 months ago
2006
ACM
A verifying compiler is one that emits both object code and a proof of correspondence between object and source code.1 We report the use of ACL2 in building a verifying compiler f...
TCAD
2008
13 years 8 months ago
2008
el Predicate Abstraction and Refinement Techniques for Verifying RTL Verilog Himanshu Jain, Daniel Kroening, Natasha Sharygina, and Edmund M. Clarke, Fellow, IEEE As a first step, ...