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DANCE
2002
IEEE
14 years 1 months ago
Design and Evaluation of a High Performance Dynamically Extensible Router
This paper describes the design, implementation and performance of an open, high performance, dynamically extensible router under development at Washington University in St. Louis...
Fred Kuhns, John D. DeHart, Anshul Kantawala, Ralp...
ASAP
2002
IEEE
76views Hardware» more  ASAP 2002»
14 years 1 months ago
A Component Architecture for FPGA-Based, DSP System Design
† Introducing FPGA components into DSP system implementations creates an assortment of challenges across system architecture and logic design. Recognizing that some of the greate...
Gary Spivey, Shuvra S. Bhattacharyya, Kazuo Nakaji...
DATE
2010
IEEE
157views Hardware» more  DATE 2010»
14 years 1 months ago
RMOT: Recursion in model order for task execution time estimation in a software pipeline
Abstract—This paper addresses the problem of execution time estimation for tasks in a software pipeline independent of the application structure or the underlying architecture. A...
Nabeel Iqbal, M. A. Siddique, Jörg Henkel
FCCM
2006
IEEE
144views VLSI» more  FCCM 2006»
14 years 2 months ago
Combining Instruction Coding and Scheduling to Optimize Energy in System-on-FPGA
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...
Robert G. Dimond, Oskar Mencer, Wayne Luk
GRAPHICSINTERFACE
2004
13 years 10 months ago
Towards the Next Generation of Tabletop Gaming Experiences
In this paper we present a novel hardware and software platform (STARS) to realize computer augmented tabletop games that unify the strengths of traditional board games and comput...
Carsten Magerkurth, Maral Memisoglu, Timo Engelke,...