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DATE
2003
IEEE
99views Hardware» more  DATE 2003»
14 years 3 months ago
Instruction Set Emulation for Rapid Prototyping of SoCs
In this paper the application of Instruction Set Emulation for rapid prototyping of SoCs will be presented. The emulation works in a way that both the software and the hardware be...
Jürgen Schnerr, Gunter Haug, Wolfgang Rosenst...
CF
2007
ACM
14 years 1 months ago
Performance/area efficiency in chip multiprocessors with micro-caches
This paper proposes the use of very small instruction caches, called micro-caches (
Michela Becchi, Mark A. Franklin, Patrick Crowley
ICCD
2000
IEEE
106views Hardware» more  ICCD 2000»
14 years 2 months ago
Fast Subword Permutation Instructions Using Omega and Flip Network Stages
This paper proposes a new way of efficiently doing arbitrary ¢ -bit permutations in programmable processors modeled on the theory of omega and flip networks. The new omflip ins...
Xiao Yang, Ruby B. Lee
SAC
2004
ACM
14 years 3 months ago
DSPxPlore: design space exploration methodology for an embedded DSP core
High mask and production costs for the newest CMOS silicon technologies increase the pressure to develop hardware platforms useable for different applications or variants of the s...
Christian Panis, Ulrich Hirnschrott, Gunther Laure...
ISPAN
2000
IEEE
14 years 2 months ago
Comprehensive Evaluation of an Instruction Reissue Mechanism
In this paper, we evaluate a mechanism to reissue instructions on the mispredicted speculation path. An instruction which is once dispatched to a functional unit during mispredict...
Toshinori Sato, Itsujiro Arita