Sciweavers

1563 search results - page 34 / 313
» Flexible instruction processors
Sort
View
SCOPES
2004
Springer
14 years 3 months ago
Instruction Selection for Compilers that Target Architectures with Echo Instructions
Echo Instructions have recently been introduced to allow embedded processors to provide runtime decompression of LZ77-compressed programs at a minimal hardware cost compared to oth...
Philip Brisk, Ani Nahapetian, Majid Sarrafzadeh
ASPDAC
2004
ACM
129views Hardware» more  ASPDAC 2004»
14 years 3 months ago
Instruction buffering exploration for low energy VLIWs with instruction clusters
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
Tom Vander Aa, Murali Jayapala, Francisco Barat, G...
ASAP
2009
IEEE
131views Hardware» more  ASAP 2009»
14 years 3 months ago
Constraint-Driven Instructions Selection and Application Scheduling in the DURASE system
This paper presents a new constraint-driven method for computational pattern selection, mapping and application scheduling using reconfigurable processor extensions. The presente...
Kevin Martin, Christophe Wolinski, Krzysztof Kuchc...
PAMI
1998
92views more  PAMI 1998»
13 years 9 months ago
INFORMys: A Flexible Invoice-Like Form-Reader System
—In this paper, we describe a flexible form-reader system capable of extracting textual information from accounting documents, like invoices and bills of service companies. In th...
Francesca Cesarini, Marco Gori, Simone Marinai, Gi...