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ICCAD
2003
IEEE
195views Hardware» more  ICCAD 2003»
14 years 6 months ago
Compiler-Based Register Name Adjustment for Low-Power Embedded Processors
We preseM an algorithm for compiler-driven regisrer mme adjustment with rhe main goal of power minimization on instruction fetch und mgisterjile access. In mosr instruction set ar...
Peter Petrov, Alex Orailoglu
CMG
2000
13 years 11 months ago
Comparing CPU Performance Between and Within Processor Families
Our study compares CPU performance on RISC and CISC uni and multiprocessors of varying speeds, and shows that the Instruction Set Architecture (ISA) style no longer matters. Our s...
Lee A. Butler, Travis Atkison, Ethan L. Miller
VLSID
2006
IEEE
119views VLSI» more  VLSID 2006»
14 years 10 months ago
Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core
Performance of applications can be boosted by executing application-specific Instruction Set Extensions (ISEs) on a specialized hardware coupled with a processor core. Many commer...
Partha Biswas, Sudarshan Banerjee, Nikil D. Dutt, ...
CODES
2006
IEEE
14 years 4 months ago
Retargetable code optimization with SIMD instructions
Retargetable C compilers are nowadays widely used to quickly obtain compiler support for new embedded processors and to perform early processor architecture exploration. One frequ...
Manuel Hohenauer, Christoph Schumacher, Rainer Leu...
ARC
2006
Springer
88views Hardware» more  ARC 2006»
14 years 1 months ago
Integrating Custom Instruction Specifications into C Development Processes
Abstract. We describe a new approach for creating hardware description language (HDL) specifications for custom instructions, to form part of the instruction-set architecture (ISA)...
Jack Whitham, Neil C. Audsley