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» Flow Logics for Constraint Based Analysis
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ITC
1998
IEEE
174views Hardware» more  ITC 1998»
14 years 26 days ago
High volume microprocessor test escapes, an analysis of defects our tests are missing
This paper explores defects found in a high volume microprocessor when shipping at a low defect level. A brief description of the manufacturing flow along with definition of DPM i...
Wayne M. Needham, Cheryl Prunty, Yeoh Eng Hong
CODES
2004
IEEE
14 years 11 days ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
CISC
2009
Springer
148views Cryptology» more  CISC 2009»
13 years 6 months ago
Using Strategy Objectives for Network Security Analysis
The anticipation game framework is an extension of attack graphs based on game theory. It is used to anticipate and analyze intruder and administrator concurrent interactions with ...
Elie Bursztein, John C. Mitchell
FDL
2007
IEEE
14 years 3 months ago
Time Modeling in MARTE
This article introduces the Time Model subprofile of MARTE, a new OMG UML Profile dedicated to Modeling and Analysis of Real-Time and Embedded systems. After a brief presentatio...
Robert de Simone, Charles André
ICLP
2009
Springer
14 years 9 months ago
Attributed Data for CHR Indexing
Abstract. The overhead of matching CHR rules is alleviated by constraint store indexing. Attributed variables provide an efficient means of indexing on logical variables. Existing ...
Beata Sarna-Starosta, Tom Schrijvers