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» Flow Time Minimization under Energy Constraints
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DFT
2003
IEEE
64views VLSI» more  DFT 2003»
14 years 2 months ago
Hybrid BIST Time Minimization for Core-Based Systems with STUMPS Architecture
1 This paper presents a solution to the test time minimization problem for core-based systems that contain sequential cores with STUMPS architecture. We assume a hybrid BIST approa...
Gert Jervan, Petru Eles, Zebo Peng, Raimund Ubar, ...
TVLSI
2002
97views more  TVLSI 2002»
13 years 8 months ago
Techniques for energy-efficient communication pipeline design
The performance of many modern computer and communication systems is dictated by the latency of communication pipelines. At the same time, power/energy consumption is often another...
Gang Qu, Miodrag Potkonjak
SAS
2009
Springer
281views Formal Methods» more  SAS 2009»
14 years 9 months ago
A Verifiable, Control Flow Aware Constraint Analyzer for Bounds Check Elimination
The Java programming language requires that out-of-bounds array accesses produce runtime exceptions. In general, this requires a dynamic bounds check each time an array element is...
David Niedzielski, Jeffery von Ronne, Andreas Gamp...
ICCV
2007
IEEE
14 years 10 months ago
Robust Visual Tracking Using the Time-Reversibility Constraint
Visual tracking is a very important front-end to many vision applications. We present a new framework for robust visual tracking in this paper. Instead of just looking forward in ...
Hao Wu, Rama Chellappa, Aswin C. Sankaranarayanan,...
DATE
2006
IEEE
124views Hardware» more  DATE 2006»
14 years 2 months ago
Timing-driven cell layout de-compaction for yield optimization by critical area minimization
This paper proposes a yield optimization method for standard-cells under timing constraints. Yield-aware logic synthesis and physical optimization require yield-enhanced standard ...
Tetsuya Iizuka, Makoto Ikeda, Kunihiro Asada